74LVC1G04GW,125

NXP  74LVC1G04GW,125  非门, LVC系列, 超高速, 1输入, 32 mA, 1.65V至5.5V, TSSOP-5

The is a Single Inverter. The 74LVC1G04 provides one inverting buffer. Input can be driven from either 3.3 or 5V devices. This feature allows the use of these devices in a mixed 3.3 and 5V environment. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

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5V Tolerant input for interfacing with 5V logic

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High noise immunity

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±24mA Output drive VCC=3.0V

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CMOS Low power consumption

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Latch-up performance exceeds 250mA

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Direct interface with TTL levels

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Inputs accept voltages up to 5V

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Complies with JEDEC standard

ESD sensitive device, take proper precaution while handling the device.