74HCT74N

NXP  74HCT74N  触发器, D, 15 ns, 59 MHz, 4 mA, DIP, 14 引脚

The is a dual positive edge triggered D-type Flip-flop has individual data nD, clock nCP, set nSD\\ and reset nRD\\ inputs and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the low-to-high clock transition, is stored in the flip-flop and appears at the nQ output. Schmitt-trigger action in the clock input, makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.

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Symmetrical output impedance

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Low power dissipation

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High noise immunity

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Balanced propagation delays

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TTL Input level

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Complies with JEDEC standard No. 7A