NXP 74HC595D,118 移位寄存器, HC系列, 串行至并行、串行至串行, 8元件, SOIC, 16 引脚, 2 V, 6 V
The 74HC595D is a 8-bit serial-in/serial or parallel-out Shift Register with output latches and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input DS and a serial output Q7S to enable cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register. Data is shifted on the low-to-high transitions of the SHCP input. The data in the shift register is transferred to the storage register on a low-to-high transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. Data in the storage register appears at the output whenever the output enable input OE is LOW. A high on OE causes the outputs to assume a high-impedance off-state. Operation of the OE input does not affect the state of the registers. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
频率 100 MHz
电源电压DC 2.00V min
输出接口数 9
针脚数 16
位数 8
输入数 1
工作温度Max 125 ℃
工作温度Min -40 ℃
电源电压 2V ~ 6V
电源电压Max 6 V
电源电压Min 2 V
安装方式 Surface Mount
引脚数 16
封装 SOIC-16
封装 SOIC-16
工作温度 -40℃ ~ 125℃
产品生命周期 Active
包装方式 Tape & Reel TR
制造应用 Industrial
RoHS标准 RoHS Compliant
含铅标准 Lead Free
REACH SVHC标准 No SVHC
REACH SVHC版本 2015/12/17
型号/品牌 | 代替类型 | 替代型号对比 |
---|---|---|
74HC595D,118 NXP 恩智浦 | 当前型号 | 当前型号 |
74HC595D,112 恩智浦 | 完全替代 | 74HC595D,118和74HC595D,112的区别 |
74HC595D-Q100,118 恩智浦 | 完全替代 | 74HC595D,118和74HC595D-Q100,118的区别 |