74F524SC

8位寄存比较 8-Bit Registered Comparator

General Description

The 74F524 is an 8-bit bidirectional register with parallel input and output plus serial input and output progressing from LSB to MSB. All data inputs, serial and parallel, are loaded by the rising edge of the input clock. The device functions are controlled by two control lines S0, S1 to exe cute shift, load, hold and read out.

Features

■ 8-Bit bidirectional register with bus-oriented input-output

■ Independent serial input-output to register

■ Register bus comparator with “equal to”, “greater than” and “less than” outputs

■ Cascadable in groups of eight bits

■ Open-collector comparator outputs for AND-wired expansion

■ Twos complement or magnitude compare