74HCT40105D,112

NXP  74HCT40105D,112  芯片, FIFO寄存器, 4位, 31MHZ, SOIC-16

The 74HCT40105D is a 4-bit x 16-word Register that can store sixteen 4-bit words. It can handle input and output data at different shifting rates. This feature makes it particularly useful as a buffer between asynchronous systems. Each word position in the register is clocked by a control flip-flop, which stores a marker bit. A logic 1 signifies that the data at that position is filled and a logic 0 denotes a vacancy in that position. The control flip-flop detects the state of the preceding flip-flop and communicates its own status to the succeeding flip-flop. When a control flip-flop is in the logic 0 state and sees a logic 1 in the preceding flip-flop, it generates a clock pulse. The clock pulse transfers data from the preceding four data latches into its own four data latches and resets the preceding flip-flop to logic 0. The first and last control flip-flops have buffered outputs.

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Independent asynchronous inputs and outputs

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Expandable in either direction

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Reset capability

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Status indicators on inputs and outputs

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TTL Input level

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Complies with JEDEC standard No. 7A