74HC74N

NXP  74HC74N  驱动器, LVDS, 正边沿触发, -40 °C, 125 °C, 2 V

The is a dual D-type Flip-Flop with set and reset and positive-edge trigger. This has individual data nD, clock nCP, set nSD and reset nRD inputs and complementary nQ and nQ outputs. Data at the nD-input that meets the set-up and hold time requirements on the low-to-high clock transition and is stored in the flip-flop and appears at the nQ output. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.

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Symmetrical output impedance

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Low power dissipation

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High noise immunity

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Balanced propagation delays

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ESD protection HBM JESD22-A114F exceeds 2000V

ESD sensitive device, take proper precaution while handling the device.