74LV4053PW,118

NXP  74LV4053PW,118  模拟开关, 三通道, SPDT, 3 放大器, 435 ohm, 1V 至 6V, TSSOP, 16 引脚

The is a single-pole double-throw SPDT triple Analog Switch suitable for use as an analog or digital multiplexer/demultiplexer. It is a low-voltage Si-gate CMOS device and is pin and function compatible with the 74HC4053 and 74HCT4053. Each switch has a digital select input Sn, two independent inputs/outputs nY0 and nY1 and a common input/output nZ. All three switches share an enable input E. A HIGH on E causes all switches into the high-impedance OFF-state, independent of Sn. VCC and GND are the supply voltage connections for the digital control inputs Sn and E. The VCC to GND range is 1 to 6V. The analog inputs/outputs nY0, nY1 and nZ can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 6V.

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Low on-resistance

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ESD Protection

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Logic level translation

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Typical break before make built-in