74AHC126D,118

NXP 74AHC126D,118 Buffer / Line Driver, 74AHC126, 2V to 5.5V, SOIC-14

The is a quad Buffer/Line Driver with 3-state outputs. The 74AHC126 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL LSTTL. It is specified in Complies with JEDEC standard no. 7-A. The 74AHC126 provides four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs nY are controlled by the output enable input nOE. A Low-level at pin nOE causes the outputs to assume a high-impedance OFF-state. The 74AHC126 is identical to the 74AHC125 but has active HIGH output enable inputs.

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Balanced propagation delays

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All inputs have Schmitt-trigger action

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Inputs accept voltages higher than VCC