74ABT573AD

NXP  74ABT573AD  芯片, 74ABT 总线接口逻辑器件

The is an octal BiCMOS transparent D Latch coupled to eight 3-state output buffers. The two sections of the device are controlled independently by E and OE\ control gates. The 74ABT573A is functionally identical to the 74ABT373 but has a flow-through pinout configuration to facilitate PC board layout and allow easy interface with microprocessors. The data on the D inputs are transferred to the latch outputs when the LE input is high. The latch remains transparent to the data inputs while E is high and stores the data that is present one setup time before the High-to-Low enable transition. The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories or MOS microprocessors. The active-low OE\ controls all eight 3-state buffers independent of the latch operation. When OE is low, the latched or transparent data appears at the outputs.

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Inputs and outputs on opposite side of package allow easy interface to microprocessors

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Common output enable

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Latch-up protection exceeds 500mA per JEDEC Std 17

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Power-up 3-state

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Power-up reset