74HC165N

NXP  74HC165N  移位寄存器, 并行至串行, 1元件, DIP, 16 引脚, 2 V, 6 V

The is a 8-bit serial-out parallel-in Shift Register is a high-speed Si-gate CMOS devices that comply with JEDEC standard no-7A. They are pin compatible with low-power Schottky TTL LSTTL . The 74HC165 is a 8-bit parallel-load or serial-in shift registers with complementary serial outputs Q7 and Q7 available from the last stage. When the parallel load PL input is low, parallel data from the D0 to D7 inputs are loaded into the register asynchronously. When PL is high, data enters the register serially at the DS input and shifts one place to the right Q0 → Q1 → Q2, etc. with each positive-going clock transition. This feature allows parallel-to-serial converter expansion by tying the Q7 output to the DS input of the succeeding stage. The clock input is a gated-OR structure which allows one input to be used as an active low clock enable CE input. The pin assignment for the CP and CE inputs is arbitrary and can be reversed for layout convenience.

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Asynchronous 8-bit parallel load

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Synchronous serial input

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ESD protection HBM JESD22-A114E exceeds 2000V

ESD sensitive device, take proper precaution while handling the device.