





NXP 74HC374N 驱动器, LVDS, -40 °C, 125 °C, 2 V
The is an octal D-type Flip-Flop with positive edge-trigger and 3-state is a high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL LSTTL . They are specified in compliance with JEDEC standard no-7A. The octal D-type flip-flops featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A clock CP and an output enable OE input are common to all flip-flops. The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the low-to-high CP transition. When OE is low, the contents of the 8 flip-flops are available at the outputs. When OE is high, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.
频率 24 MHz
电源电压DC 5.00 V, 6.00 V max
输出电流 7.80 mA
电路数 8
针脚数 20
位数 8
极性 Non-Inverting
逻辑门个数 8
工作温度Max 125 ℃
工作温度Min -40 ℃
电源电压Max 6 V
电源电压Min 2 V
安装方式 Through Hole
引脚数 20
封装 PDIP
封装 PDIP
产品生命周期 Unknown
包装方式 Each
制造应用 Communications & Networking, 通信与网络
RoHS标准 RoHS Compliant
含铅标准 Lead Free
REACH SVHC标准 No SVHC
REACH SVHC版本 2015/12/17


