74LV595PW,118

NXP  74LV595PW,118  移位寄存器, LV系列, 串行至并行、串行至串行, 1元件, TSSOP, 16 引脚, 1 V, 3.6 V

The 74LV595PW is a 8 stage serial Shift Register with a storage register and 3-state outputs. It is a low-voltage Si-gate CMOS device and is pin and functionally compatible with the 74HC595 and 74HCT595. Data is shifted on the positive-going transitions of the SHCP input. The data in the shift register is transferred to the storage register on a positive-going transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. The shift register has a serial input DS and a serial output Q7S for cascading the device. It is also provided with an asynchronous reset input MR\ active low for all 8 shift register stages. The storage register has 8 parallel 3-state bus driver outputs. Data in the storage register appears at the output whenever the OE\ is low.

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Has a shift register with direct clear

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Optimized for low voltage applications

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Accepts TTL input levels between 2.7 to 3.6V VCC

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>2V at VCC = 3.3V, Tamb = 25°C Typical high-level output voltage VOH undershoot