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The 74HC4094D is a 8-bit serial-in/serial or parallel-out shift-and-store Bus Register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input D and two serial outputs QS1 and QS2 to enable cascading. Data is shifted on the low-to-high transitions of the CP input. Data is available at QS1 on the low-to-high transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next high-TO-low transition of the CP input to allow cascading when clock edges are slow. The data in the shift register is transferred to the storage register when the STR input is high. Data in the storage register appears at the outputs whenever the OE is high. A low on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes.
电源电压DC 2.00V min
输出接口数 10
针脚数 16
位数 8
输入数 1
工作温度Max 125 ℃
工作温度Min -40 ℃
电源电压 2V ~ 6V
电源电压Max 6 V
电源电压Min 2 V
安装方式 Surface Mount
引脚数 16
封装 SOIC-16
高度 1.45 mm
封装 SOIC-16
工作温度 -40℃ ~ 125℃
产品生命周期 Active
包装方式 Tape & Reel TR
制造应用 Consumer Electronics, Industrial
RoHS标准 RoHS Compliant
含铅标准 Lead Free
REACH SVHC标准 No SVHC
REACH SVHC版本 2015/12/17
ECCN代码 EAR99
| 型号/品牌 | 代替类型 | 替代型号对比 |
|---|---|---|
74HC4094D,653 NXP 恩智浦 | 当前型号 | 当前型号 |
74HC4094D,652 恩智浦 | 完全替代 | 74HC4094D,653和74HC4094D,652的区别 |
74HC4094DB,118 恩智浦 | 完全替代 | 74HC4094D,653和74HC4094DB,118的区别 |
74HC4094DB,112 恩智浦 | 完全替代 | 74HC4094D,653和74HC4094DB,112的区别 |