NXP 74HC173PW,118 触发器, 三态非反相, 正沿, D, 88 MHz, TSSOP, 16 引脚
The 74HC173PW is a quad positive-edge trigger D-type Flip-flop with 3-state outputs. This high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL LSTTL. This 4-bit parallel load register with clock enable control, 3-state buffered outputs Q0 to Q3 and master reset MR. When the two data enable inputs E1\ and E2\\ are low, the data on the Dn inputs is loaded into the register synchronously with the low-to-high clock transition. When one or both En\ inputs are high one set-up time prior to the low-to-high clock transition, the register will retain the previous data. Data inputs and clock enable inputs are fully edge-triggered and must be stable only one set-up time prior to the low-to-high clock transition. The master reset input MR is an active high asynchronous input. When MR is high, all four flip-flops are reset cleared independently of any other input condition.
频率 88 MHz
电源电压DC 2.00V min
针脚数 16
时钟频率 95 MHz
输入电容 3.5 pF
工作温度Max 125 ℃
工作温度Min -40 ℃
电源电压 2V ~ 6V
电源电压Max 6 V
电源电压Min 2 V
安装方式 Surface Mount
引脚数 16
封装 TSSOP-16
高度 0.95 mm
封装 TSSOP-16
工作温度 -40℃ ~ 125℃ TA
产品生命周期 Active
包装方式 Cut Tape CT
制造应用 Computers & Computer Peripherals, Consumer Electronics, Industrial, Communications & Networking
RoHS标准 RoHS Compliant
含铅标准 Lead Free
REACH SVHC标准 No SVHC
REACH SVHC版本 2015/12/17