74LVC1G07GV,125

带开漏极输出的单缓冲器

The is a non-inverting Buffer with open-drain output. The open drain output can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. Inputs can be driven from either 3.3/5V devices. This feature allows the use of this device in a mixed 3.3 and 5V environment. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

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High noise immunity

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CMOS low power consumption

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Direct interface with TTL levels

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Complies with JEDEC standard

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5V Tolerant input/output for interfacing with 5V logic

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Latch-up performance exceeds 250mA

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Inputs accept voltages up to 5V