Cache Controller, 16M X 36, PQFP208, QFP-208
PCI, CACHE AND MEMORY CONTROLLER PCMC
The 82434LX/ PCI, Cache, Memory Controllers PCMC integrate the cache and main memory DRAM control functions and provide bus control for transfers between the CPU, cache, main memory, and the PCI Local Bus. The cache controller supports write-back or write-through for 82434LX cache policy and cache sizes of 256-KBytes and 512-KBytes. The cache memory can be implemented with either standard or burst SRAMs. The PCMC cache controller integrates a high-performance Tag RAM to reduce system cost.
Supports the PentiumTMProcessor at iCOMPTMIndex 510/60 MHz and iCOMP Index 567T66 MHz
Supports the Pentium Processor at iCOMP Index 735/90 MHz, iCOMP Index 815T100 MHz, and iCOMP Index 610/75 MHz
Supports Pipelined Addressing Capability of the Pentium Processor
The 82430NX Drives 3.3V Signal Levels on the CPU and Cache Interfaces
High Performance CPU/PCI/Memory Interfaces via Posted Write and Read Prefetch Buffers
Fully Synchronous PCI Interface with Full Bus Master Capability
Supports the Pentium Processor Internal Cache in Either Write-Through or Write-Back Mode
Programmable Attribute Map of DOS and BIOS Regions for System Flexibility
Integrated Low Skew Clock Driver for Distributing Host Clock
Integrated Second Level Cache Controller
Integrated Cache Tag RAM
Write-Through and Write-Back Cache Modes for the 82434LX
Write-Back for the 82434NX
82434NX Supports Low-Power Cache Standby
Direct Mapped Organization
Supports Standard and Burst SRAMs
256-KByte and 512-KByte Sizes
Cache Hit Cycle of 3-1-1-1 on Reads and Writes Using Burst SRAMs
Cache Hit Cycle of 3-2-2-2 on Reads and 4-2-2-2 on Writes Using Standard SRAMs