CD74AC74M

TEXAS INSTRUMENTS  CD74AC74M  触发器, 设置和复位, 互补输出, 正沿, D, 10 ns, 110 MHz, 24 mA, SOIC, 14 引脚

The is a dual positive-edge-triggered D-type Flip-flop with set and reset. A low level at the preset PRE\\ or clear CLR\\ inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE\ and CLR\ are inactive high, data at the data D input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.

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Speed of Bipolar F, AS and S, with significantly reduced power consumption

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Balanced propagation delays

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±24mA Output drive current

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SCR-Latchup-resistant CMOS process and circuit design

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Green product and no Sb/Br