CDC3S04YFFR

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CDC3S04YFFR概述

四正弦波时钟缓冲器具有LDO Quad Sine-Wave Clock Buffer With LDO

The CDC3S04 is a four-channel low-power low-jitter sine-wave clock buffer. It can be used to buffer a single master clock to multiple peripherals. The four sine-wave outputs CLK1–CLK4 are designed for minimal channel-to-channel skew and ultralow additive output jitter.

Each output has its own clock request inputs which enables the dedicated clock output. These clock requests are active-high can also be changed to be active-low via I2C, and an output signal is generated that can be sent back to the master clock to request the clock MCLK_REQ. MCKL_REQ is an open-source output and supports the wired-OR function default mode. It needs an external pulldown resistor. MCKL_REQ can be changed to wired-AND or push-pull functionality via I2C.

The CDC3S04 also provides an I2C interface Hs-mode that can be used to enable or disable the outputs, select the polarity of the REQ inputs, and allow control of internal decoding.

The CDC3S04 features an on-chip high-performance LDO that accepts voltages from 2.3 V to 5.5 V and outputs a 1.8-V supply. This 1.8-V supply can be used to power an external 1.8-V TCXO. It can be enabled or disabled for power saving at the TCXO.

A low signal at the RESET input switches the outputs CLK1 and CLK4 into the default state. In this configuration, CLK1 and CLK4 are ON see ; the remaining device function is not affected. Also, the RESET input provides a glitch filter which rejects spikes of typical 300 ns on the RESET line to preserve false reset. A complete device reset to the default condition can be initiated by a power-up cycle of VDD_DIG.

The CDC3S04 operates from two 1.8-V supplies. There is a core supply VDD_DIG/GND_DIG for the core logic and a low-noise analog supply VDD_ANA/GND_ANA for the sine-wave outputs. The CDC3S04 is designed for sequence-less power up. Both supply voltages may be applied in any order.

The CDC3S04 is offered in a 0.4-mm pitch WCSP package 1.6 mm × 2 mm and is optimized for low standby current 0.5 µA. It is characterized for operation from –40°C to 85°C.

CDC3S04YFFR中文资料参数规格
技术参数

频率 52 MHz

电源电压DC 1.80 V

输出接口数 4

供电电流 2.00 mA

电路数 1

输入电流 2.00 mA

工作温度Max 85 ℃

工作温度Min -30 ℃

电源电压 1.65V ~ 1.95V

电源电压Max 1.95 V

电源电压Min 1.65 V

封装参数

安装方式 Surface Mount

引脚数 20

封装 DSBGA-20

外形尺寸

高度 0.33 mm

封装 DSBGA-20

物理参数

工作温度 -30℃ ~ 85℃

其他

产品生命周期 Active

包装方式 Tape & Reel TR

符合标准

RoHS标准 RoHS Compliant

含铅标准 Lead Free

REACH SVHC标准 No SVHC

REACH SVHC版本 2015/06/15

海关信息

ECCN代码 EAR99

数据手册

CDC3S04YFFR引脚图与封装图
CDC3S04YFFR引脚图
CDC3S04YFFR封装图
CDC3S04YFFR封装焊盘图
在线购买CDC3S04YFFR
型号: CDC3S04YFFR
制造商: TI 德州仪器
描述:四正弦波时钟缓冲器具有LDO Quad Sine-Wave Clock Buffer With LDO
替代型号CDC3S04YFFR
型号/品牌 代替类型 替代型号对比

CDC3S04YFFR

TI 德州仪器

当前型号

当前型号

CDC3RL02YFPR

德州仪器

功能相似

CDC3S04YFFR和CDC3RL02YFPR的区别

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