CY74FCT646ATQCT

8位寄存收发器 8-Bit Registered Transceiver

The \x92FCT646T devices consist of a bus transceiver circuit with 3-state, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers as the appropriate clock pin goes to a high logic level. Output-enable G\\\\ and direction DIR inputs control the transceiver function. In the transceiver mode,data present at the high-impedance port can be stored in either the A or B register, or in both. Select controls SAB, SBA can multiplex stored and real-time transparent mode data. DIR determines which bus receives data when G\ is low. In the isolation mode G\ is high, A data can be stored in the B register and/or B data can be stored in the A register.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. View datasheet View product folder