CD74HCT154M96

TEXAS INSTRUMENTS  CD74HCT154M96  芯片, 解码器/信号分离器, 4:16, SOIC-24

The is a 4-to-16 high speed CMOS Decoder/Demultiplexer with two enable inputs, E1 and E2. A High on either enable input forces the output into the High state. The demultiplexing function is performed by using the four input lines, A0 to A3, to select the output lines Y0\ to Y15\ and using one enable as the data input while holding the other enable low.

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Two enable inputs to facilitate demultiplexing and cascading functions

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Balanced propagation delay and transition times

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Significant power reduction compared to LSTTL logic ICs

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High noise immunity

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Direct LSTTL input logic compatibility

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10 LSTTL Loads standard outputs

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15 LSTTL Loads bus driver outputs

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Green product and no Sb/Br