CY7C185-20PXC

CYPRESS SEMICONDUCTOR  CY7C185-20PXC  存储芯片, SRAM, 64K, 8KX8, 20NS, DIP28

The is a 64kB high-performance CMOS Static Random Access Memory SRAM organized as 8192 words by 8-bit. Easy memory expansion is provided by an active LOW chip enable, an active HIGH chip enable and active LOW output enable and tri-state drivers. This device has an automatic power-down feature, reducing the power consumption by 70% when deselected. An active LOW write enable signal controls the writing/reading operation of the memory. When CE1 and WE inputs are both LOW and CE2 is HIGH, data on the eight data input/output pins is written into the memory location addressed by the address present on the address pins. Reading the device is accomplished by selecting the device and enabling the outputs, CE1 and OE active LOW, CE2 active HIGH, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins are present on the eight data input or output pins.

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High speed - 15ns

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Fast tDOE

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Low active power

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Low standby power

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CMOS for optimum speed/power

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Easy memory expansion with CE and OE

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TTL-compatible inputs and outputs

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Automatic power-down when deselected