CY7C1248KV18-400BZC

36兆位的DDR II + SRAM 2字突发架构（ 2.0周期读延迟） 36-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.0 Cycle Read Latency

SRAM - Synchronous, DDR II+ Memory IC 36Mb 2M x 18 Parallel 400MHz 165-FBGA 13x15

立创商城:
CY7C1248KV18-400BZC

艾睿:
SRAM Chip Sync Single 1.8V 36M-bit 2M x 18 0.45ns 165-Pin FBGA Tray

安富利:
SRAM Chip Sync Single 1.8V 36M-Bit 2M x 18 0.45ns 165-Pin FBGA Tray

Chip1Stop:
SRAM Chip Sync Single 1.8V 36M-Bit 2M x 18 0.45ns 165-Pin FBGA Tray

DeviceMart:
IC SRAM DDR-II+ CIO 36MB 165FBGA