CLVTH16374IDLREP

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CLVTH16374IDLREP概述

3.3 -V ABT 16位边沿触发D型触发器具有三态输出 3.3-V ABT 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

The SN74LVTH16374 is a 16-bit edge-triggered D-type flip-flop with 3-state outputs designed for low-voltage 3.3-V VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. This device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

This device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock CLK, the Q outputs of the flip-flop take on the logic levels set up at the data D inputs.

A buffered output-enable OE\ input can be used to place the eight outputs in either a normal logic state high or low logic levels or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components.

OE\ does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

CLVTH16374IDLREP中文资料参数规格
技术参数

频率 160 MHz

电源电压DC 2.70V ~ 3.60V

输出接口数 8

输出电流 64.0 mA

电路数 2

时钟频率 160 MHz

位数 16

极性 Non-Inverting

电压波节 3.30 V, 2.70 V

输入电容 3 pF

输入数 8

工作温度Max 85 ℃

工作温度Min -40 ℃

电源电压 2.7V ~ 3.6V

电源电压Max 3.6 V

电源电压Min 2.7 V

封装参数

安装方式 Surface Mount

引脚数 48

封装 SSOP-48

外形尺寸

宽度 7.49 mm

封装 SSOP-48

物理参数

工作温度 -40℃ ~ 85℃ TA

其他

产品生命周期 Active

包装方式 Tape & Reel TR

符合标准

RoHS标准 RoHS Compliant

含铅标准 Contains Lead

海关信息

ECCN代码 EAR99

数据手册

CLVTH16374IDLREP引脚图与封装图
CLVTH16374IDLREP引脚图
CLVTH16374IDLREP封装图
CLVTH16374IDLREP封装焊盘图
在线购买CLVTH16374IDLREP
型号: CLVTH16374IDLREP
制造商: TI 德州仪器
描述:3.3 -V ABT 16位边沿触发D型触发器具有三态输出 3.3-V ABT 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

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