CMOS或门 CMOS OR GATES
CMOS OR Gates
OR gates provide the system designer with direct implementation of the positive-logic OR
function and supplement the existing family of CMOS gates.
The CD4071B, CD4072B, and CD4075B types are supplied in 14-lead hermetic dual-in-line
ceramic packages F3A suffix, 14-lead dual-in-line plastic packages E suffix, 14-lead small-outline packages M, MT, M96, and NSR suffixes, and 14-lead thin shrink small-outline packages PW and PWR suffixes.
贸泽:
逻辑门 Dual 4-Input OR Gate
艾睿:
OR Gate 2-Element 4-IN CMOS 14-Pin CDIP Tube
安富利:
OR Gate 2-Element 4-IN CMOS 14-Pin CDIP Tube
Chip1Stop:
OR Gate 2-Element 4-IN CMOS 14-Pin CDIP Tube
Verical:
OR Gate 2-Element 4-IN CMOS 14-Pin CDIP Tube
电源电压DC 3.00V ~ 18.0V
输出接口数 1
位数 2
传送延迟时间 250 ns
电压波节 5.00 V, 10.0 V, 15.0 V
逻辑门个数 2
输出电流驱动 -1.00 mA
输入数 4
工作温度Max 125 ℃
工作温度Min -55 ℃
安装方式 Through Hole
引脚数 14
封装 CDIP-16
长度 19.56 mm
宽度 6.92 mm
高度 3.56 mm
封装 CDIP-16
工作温度 -55℃ ~ 125℃
产品生命周期 Active
包装方式 Tube
RoHS标准 Non-Compliant
含铅标准 Contains Lead
香港进出口证 NLR