CY7C1270KV18-550BZC

36兆位的DDR II + SRAM 2字突发架构（ 2.0周期读延迟） 36-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.0 Cycle Read Latency

SRAM - Synchronous, DDR II+ Memory IC 36Mb 1M x 36 Parallel 550MHz 165-FBGA 13x15

立创商城:
CY7C1270KV18-550BZC

得捷:
IC SRAM 36M PARALLEL 165FBGA

贸泽:
SRAM 36MB 1Mx36 1.8v 550MHz DDR II SRAM

艾睿:
SRAM Chip Sync Single 1.8V 36M-bit 1M x 36 0.45ns 165-Pin FBGA Tray

Chip1Stop:
SRAM Chip Sync Single 1.8V 36M-bit 1M x 36 0.45ns 165-Pin FBGA Tray

DeviceMart:
IC SRAM 1MX36 1.8V SYNC 165-FBGA