36兆位的DDR - II SRAM的2字突发架构 36-Mbit DDR-II SRAM 2-Word Burst Architecture
SRAM - 同步,DDR II 存储器 IC 36Mb(1M x 36) 并联 165-FBGA(15x17)
立创商城:
CY7C1420JV18-300BZXC
艾睿:
SRAM Chip Sync Single 1.8V 36M-bit 1M x 36 0.45ns 165-Pin FBGA
Chip1Stop:
SRAM Chip Sync Single 1.8V 36M-Bit 1M x 36 0.45ns 165-Pin FBGA
罗切斯特:
SRAM Chip Sync Single 1.8V 36M-bit 1M x 36 0.45ns 165-Pin FBGA