18兆位的DDR II + SRAM 2字突发架构( 2.0周期读延迟) 18-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.0 Cycle Read Latency
SRAM - Synchronous, DDR II+ Memory IC 18Mb 512K x 36 Parallel 400MHz 165-FBGA 13x15
立创商城:
CY7C11501KV18-400BZXI
贸泽:
静态随机存取存储器 516K X 36 400MHz DDR II+ 静态随机存取存储器
艾睿:
SRAM Chip Sync Single 1.8V 18M-Bit 512K x 36 0.45ns 165-Pin FBGA
Win Source:
18-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.0 Cycle Read Latency