CY7C11481KV18-400BZC

18兆位的DDR II + SRAM 2字突发架构（ 2.0周期读延迟） 18-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.0 Cycle Read Latency

SRAM - Synchronous, DDR II+ Memory IC 18Mb 1M x 18 Parallel 400MHz 165-FBGA 13x15

立创商城:
CY7C11481KV18-400BZC

得捷:
IC SRAM 18MBIT PARALLEL 165FBGA

艾睿:
SRAM Chip Sync Single 1.8V 18M-Bit 1M x 18 0.45ns 165-Pin FBGA Tray

Chip1Stop:
SRAM Chip Sync Single 1.8V 18M-bit 1M x 18 0.45ns 165-Pin FBGA Tray

Win Source:
18-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.0 Cycle Read Latency