36兆位QDR⑩ -II + SRAM 4字突发架构( 2.5周期读延迟) 36-Mbit QDR⑩-II+ SRAM 4-Word Burst Architecture 2.5 Cycle Read Latency
SRAM - Synchronous, QDR II Memory IC 36Mb 4M x 8 Parallel 375MHz 165-FBGA 15x17
得捷:
IC SRAM 36M PARALLEL 165FBGA
艾睿:
SRAM Chip Sync Dual 1.8V 36M-Bit 2M x 18 0.45ns 165-Pin FBGA