CY7C131-35JC

CY7C131-35JC图片1
CY7C131-35JC图片2
CY7C131-35JC概述

1K ×8双端口静态RAM 1K x 8 Dual-Port Static RAM

Functional Description

The CY7C130/CY7C131/CY7C140 and CY7C141 are high-speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in memory. The CY7C130/ CY7C131 can be utilized as either a standalone 8-bit dual-port static RAM or as a master dual-port RAM in conjunction with the CY7C140/CY7C141 slave dual-port device in systems requiring 16-bit or greater word widths. It is the solution to applications requiring shared or buffered data, such as cache memory for DSP, bit-slice, or multiprocessor designs.

Features

• True Dual-Ported memory cells which allow simultaneous reads of the same memory location

• 1K x 8 organization

• 0.65-micron CMOS for optimum speed/power

• High-speed access: 15 ns

• Low operating power: ICC = 110 mA max.

• Fully asynchronous operation

• Automatic power-down

• Master CY7C130/CY7C131 easily expands data bus width to 16 or more bits using slave CY7C140/CY7C141

• BUSY output flag on CY7C130/CY7C131; BUSY input on CY7C140/CY7C141

• INT flag for port-to-port communication

• Available in 48-pin DIP CY7C130/140, 52-pin PLCC, 52-Pin TQFP.

• Pb-Free packages available

CY7C131-35JC中文资料参数规格
技术参数

电源电压DC 5.00 V, 5.50 V max

时钟频率 35.0 GHz

存取时间 35.0 ns

内存容量 8000 B

封装参数

安装方式 Surface Mount

引脚数 52

封装 PLCC

外形尺寸

封装 PLCC

其他

产品生命周期 Unknown

包装方式 Bulk

符合标准

RoHS标准 Non-Compliant

含铅标准 Contains Lead

数据手册

在线购买CY7C131-35JC
型号: CY7C131-35JC
制造商: Cypress Semiconductor 赛普拉斯
描述:1K ×8双端口静态RAM 1K x 8 Dual-Port Static RAM
替代型号CY7C131-35JC
型号/品牌 代替类型 替代型号对比

CY7C131-35JC

Cypress Semiconductor 赛普拉斯

当前型号

当前型号

CY7C131-25JXC

赛普拉斯

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CY7C131-55JXC

赛普拉斯

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CY7C131-25JXCT

赛普拉斯

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