CDCVF111

CDCVF111图片1
CDCVF111概述

1:9 差动 LVPECL 时钟驱动器

The differential LVPECL clock-driver circuit distributes one pair of differential LVPECL clock inputs CLKIN, CLKIN\ to nine pairs of differential clock Y, Y\ outputs with minimum skew for clock distribution. It is specifically designed for driving 50- transmission lines.

The VREF output can be strapped to the CLKIN\ input for a single-ended CLKIN input.

The is characterized for operation from –40°C to 85°C.

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Low-Output Skew for Clock-Distribution Applications
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Differential Low-Voltage Pseudo-ECL LVPECL Compatible Inputs and Outputs
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Distributes Differential Clock Inputs to Nine Differential Clock Outputs
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Output Reference Voltage VREF Allows Distribution From a Single-Ended Clock Input
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Packaged In a 28-Pin Plastic Chip Carrier
CDCVF111中文资料参数规格
其他

产品生命周期 正在供货

符合标准

RoHS标准 RoHS Compliant

含铅标准 Lead Free

数据手册

在线购买CDCVF111
型号: CDCVF111
制造商: TI 德州仪器
描述:1:9 差动 LVPECL 时钟驱动器
替代型号CDCVF111
型号/品牌 代替类型 替代型号对比

CDCVF111

TI 德州仪器

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当前型号

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