1:9 差动 LVPECL 时钟驱动器
The differential LVPECL clock-driver circuit distributes one pair of differential LVPECL clock inputs CLKIN, CLKIN\ to nine pairs of differential clock Y, Y\ outputs with minimum skew for clock distribution. It is specifically designed for driving 50- transmission lines.
The VREF output can be strapped to the CLKIN\ input for a single-ended CLKIN input.
The is characterized for operation from 40°C to 85°C.
型号/品牌 | 代替类型 | 替代型号对比 |
---|---|---|
CDCVF111 TI 德州仪器 | 当前型号 | 当前型号 |
CDCLVP110 德州仪器 | 功能相似 | CDCVF111和CDCLVP110的区别 |
CDCP1803 德州仪器 | 功能相似 | CDCVF111和CDCP1803的区别 |
CDCLVP215 德州仪器 | 功能相似 | CDCVF111和CDCLVP215的区别 |