DS34T108GN

DS34T108GN图片1
DS34T108GN图片2
DS34T108GN概述

单/双/四/八通道的TDM-over -Packet时芯片 Single/Dual/Quad/Octal TDM-over-Packet Chip

General Description

These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial stream to be transported transparently over IP, MPLS or Ethernet networks. Jitter and wander of recovered clocks conform to G.823/G.824, G.8261, and TDM specifications. TDM data is transported in up to 64 individually configurable bundles. All standards based TDM-over-packet mapping methods are supported except AAL2. Frame-based serial HDLC data flows are also supported. With built-in full featured E1/T1 framers and LIUs. These ICs encapsulate the TDM-over-packet solution from analog E1/T1 signal to Ethernet MII while preserving options to make use of TDM streams at key intermediate points. The high level of integration available with the DS34T10x devices minimizes cost, board space, and time to market.

Features

♦ Full-Featured IC Includes E1/T1 LIUs and Framers, TDMoP Engine, and 10/100 MAC

♦ Transport of E1, T1, E3, T3 or STS-1 TDM or CBR Serial Signals Over Packet Networks

♦ Full Support for These Mapping Methods: SAToP, CESoPSN, TDMoIP AAL1, HDLC, Unstructured, Structured, Structured with CAS

♦ Adaptive Clock Recovery, Common Clock, External Clock and Loopback Timing Modes

♦ On-Chip TDM Clock Recovery Machines, One Per Port, Independently Configurable

♦ Clock Recovery Algorithm Handles Network PDV, Packet Loss, Constant Delay Changes, Frequency Changes and Other Impairments

♦ 64 Independent Bundles/Connections

♦ Multiprotocol Encapsulation Supports IPv4, IPv6, UDP, RTP, L2TPv3, MPLS, Metro Ethernet

♦ VLAN Support According to 802.1p and 802.1Q

♦ 10/100 Ethernet MAC Supports MII/RMII/SSMII

♦ Selectable 32-Bit, 16-Bit or SPI Processor Bus

♦ Operates from Only Two Clock Signals, One for Clock Recovery and One for Packet Processing

♦ Glueless SDRAM Buffer Management

♦ Low-Power 1.8V Core, 3.3V I/O

Applications

  TDM Circuit Extension Over PSN

     o Leased-Line Services Over PSN

     o TDM Over GPON/EPON

     o TDM Over Cable

     o TDM Over Wireless

  Cellular Backhaul Over PSN

  Multiservice Over Unified PSN

  HDLC-Based Traffic Transport Over PSN

DS34T108GN中文资料参数规格
技术参数

通道数 8

工作温度Max 85 ℃

工作温度Min 40 ℃

电源电压Max 3.465 V

电源电压Min 3.135 V

封装参数

安装方式 Surface Mount

封装 BGA-484

外形尺寸

封装 BGA-484

其他

产品生命周期 Unknown

包装方式 Tube

制造应用 数据传输

符合标准

RoHS标准 RoHS Compliant

含铅标准 Contains Lead

数据手册

DS34T108GN引脚图与封装图
DS34T108GN引脚图
DS34T108GN封装图
DS34T108GN封装焊盘图
在线购买DS34T108GN
型号: DS34T108GN
描述:单/双/四/八通道的TDM-over -Packet时芯片 Single/Dual/Quad/Octal TDM-over-Packet Chip
替代型号DS34T108GN
型号/品牌 代替类型 替代型号对比

DS34T108GN

Maxim Integrated 美信

当前型号

当前型号

DS26519GN

美信

完全替代

DS34T108GN和DS26519GN的区别

DS21458N

美信

类似代替

DS34T108GN和DS21458N的区别

DS21455N

美信

类似代替

DS34T108GN和DS21455N的区别

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