DSPIC30F5011-20I/PT

MICROCHIP  DSPIC30F5011-20I/PT  芯片, 16位数字信号控制器 20MHZ

The is a 16-bit high-performance Digital Signal Controller features CPU core has a 24-bit instruction word. The Program Counter PC is 23-bit wide with the least significant bit LSb always clear and the most significant bit MSb is ignored during normal program execution, except for certain specialized instructions. Thus, the PC can address up to 4M instruction words of user program space. An instruction prefetch mechanism is used to help maintain throughput. Program loop constructs, free from loop count management overhead, are supported using the DO and REPEAT instructions, both of which are interruptible at any point.

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Modified Harvard architecture

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C-compiler optimized instruction set architecture

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84 base instructions with flexible addressing modes

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24-bit wide instructions

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16 x 16-bit working register array modes

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DSP engine - Modulo and bit-reversed addressing modes

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Peripheral features - 3-wire SPI™ modules

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12-bit 200kSPS analogue-to-digital converter A/D

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A/D conversion during sleep and idle

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Enhanced flash program memory - 10,000 erase/write cycle minimum

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Data EEPROM memory - 100000 erase/write cycle minimum

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Self-reprogrammable under software control

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Power-on reset POR, power-up timer PWRT and oscillator start-up timer OST

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Flexible Watchdog Timer WDT with on-chip low power RC oscillator for reliable operation

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Fail-safe clock monitor operation

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Detects clock failure and switches to on-chip low power RC oscillator

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Programmable code protection

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In-Circuit Serial Programming™ ICSP™

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Programmable brown-out detection and reset generation

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Selectable power management modes - Sleep, idle and alternate clock modes

ESD sensitive device, take proper precaution while handling the device.