DS92LV2422SQE/NOPB

TEXAS INSTRUMENTS  DS92LV2422SQE/NOPB  SerDes, 解串器, 2.1 Gbps, CML, LVCMOS, WQFN, 60 引脚

The is a Channel-Link II Deserializer Chipset translates a parallel 24-bit LVCMOS data interface into a single high-speed CML serial interface with embedded clock information. This single serial stream eliminates skew issues between clock and data, reduces connector size for transferring a 24-bit or less, bus over FR-4 printed circuit board backplanes and balanced cables. In addition to the 24-bit data bus interface, it also features a 3-bit control bus for slow speed signals. This allows implementing video and display applications with up to 24-bit per pixel RGB. Programmable transmit de-emphasis, receive equalization, on-chip scrambling and DC balancing enables longer distance transmission over lossy cables and backplanes. The chipset is programmable though an I²C interface as well as through pins. A built-in AT-SPEED BIST feature validates link integrity and may be used for system diagnostics.

.

AC coupled STP interconnect cable up to 10m

.

Integrated terminations on Ser and Des

.

AT-SPEED link BIST Mode and reporting pin

.

Power down mode minimizes power dissipation

.

Fast random data lock

.

No reference clock required

.

Adjustable input receiver equalization

.

Lock real time link status reporting pin

.

EMI minimization on output parallel bus SSCG

.

Output slew control OS

.

24-bit Data, 3-bit control and 10 to 75MHz clock

.

>8kV HBM

.

Green product and no Sb/Br