DM9000EP

DAVICOM  DM9000EP  芯片, 以太网控制器, 10/100M PHY, 100LQFP

The is a fully integrated and cost-effective single chip fast Ethernet MAC Controller IC with a general processor interface, a 10/100M PHY and 4K Dword SRAM. It is designed with low power and high performance process that support 3.3V with 5V tolerance. It also provides a MII interface to connect HPNA device or other transceivers that support MII interface. It supports 8-bit, 16-bit and 32-bit uP interfaces to internal memory accesses for different processors.

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Integrated 10/100M transceiver

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Supports back pressure mode for half-duplex mode flow control

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IEEE802.3x flow control for full-duplex mode

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Supports automatically load vendor ID and product ID from EEPROM

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Supports 4 GPIO pins

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Supports wakeup frame, link status change and magic packet events for remote wake up

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Very low power consumption mode

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100-pin LQFP with CMOS process