EP3C5M164C8N

ALTERA  EP3C5M164C8N  芯片, FPGA, CYCLONE III, 5K单元, 164MQFP

The is a Cyclone® III FPGA consists of 5136 vertically arranged logic elements LEs, 414kb of embedded memory and 23 18x18 embedded multipliers. The architecture includes highly efficient interconnect and low-skew clock networks, providing connectivity between logic structures for clock and data signals. The logic and routing core fabric is surrounded by I/O elements IOEs and phase-locked loops PLLs. The low-power Cyclone® III FPGA family is the third generation in the ® Cyclone FPGA series. With its unprecedented combination of low power, high functionality, the Cyclone III FPGA family broadens the number of high-volume, cost-sensitive applications that can benefit from an FPGA. The Cyclone III LS variant extends the family with higher density, higher memory, smaller packages and security features to protect your intellectual property IP.

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2 Phase-locked loops

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70 Differential channels

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Hot-socketing operation support

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Routing architecture optimized for design separation flow with the Quartus® II software

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Ability to disable external JTAG port

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Error detection ED cycle indicator to core

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Internal oscillator enables system monitor and health check capabilities

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High memory-to-logic and multiplier-to-logic ratio

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High I/O count, low-and mid-range density devices for user I/O constrained applications

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Remote system upgrade without the aid of an external controller

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Dedicated cyclical redundancy code checker circuitry to detect single-event upset SEU issues