双N和P通道FET数字 Dual N & P Channel , Digital FET
General Description
These dual N & P Channel logic level enhancement mode field effec transistors are produced using "s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. The device is an improved design especially for low voltage applications as a replacement for bipolar digital transistors in load switching applications. Since bias resistors are not required, this dual digital FET can replace several digital transistors with difference bias resistors.
Features
■ N-Ch 25 V, 0.22 A, RDSON = 5 W @ VGS= 2.7 V.
■ P-Ch 25 V, -0.46 A, RDSON = 1.5 W @ VGS= -2.7 V.
■ Very low level gate drive requirements allowing direct operation in 3 V circuits. VGSth < 1.5 V.
■ Gate-Source Zener for ESD ruggedness.
>6kV Human Body Model
■ Replace NPN & PNP digital transistors.
额定电流 220 mA
漏源极电阻 5.00 Ω
极性 N-Channel, P-Channel
耗散功率 900 mW
输入电容 62.0 pF
栅电荷 1.00 nC
漏源极电压Vds 25 V
漏源击穿电压 ±25.0 V
栅源击穿电压 ±8.00 V
连续漏极电流Ids 220 mA, 460 mA
上升时间 8.00 ns
输入电容Ciss 9.5pF @10VVds
额定功率Max 700 mW
安装方式 Surface Mount
封装 TSOT-23-6
封装 TSOT-23-6
工作温度 -55℃ ~ 150℃ TJ
产品生命周期 Unknown
包装方式 Tape & Reel TR
RoHS标准 RoHS Compliant
含铅标准 Lead Free
ECCN代码 EAR99