HEF4013BT

NXP  HEF4013BT  触发器, 互补输出, 正沿, D, 30 ns, 40 MHz, 2.4 mA, SOIC, 14 引脚

The is a Dual D-type Flip-flop features independent set-direct input SD, clear-direct input CD, clock input CP and outputs Q, Q. Data is accepted when CP is LOW and is transferred to the output on the positive-going edge of the clock. The active high asynchronous CD and SD inputs are independent and override the D or CP inputs. The outputs are buffered for best system performance. The clock input"s Schmitt-trigger action makes the circuit highly tolerant of slower clock rise and fall times. It operates over a recommended VDD power supply range of 3V to 15V referenced to VSS usually ground. Unused inputs must be connected to VDD, VSS or another input.

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Tolerant of slow clock rise and fall times

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Fully static operation

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Standardized symmetrical output characteristics

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Complies with JEDEC standard JESD 13-B