SRAM Chip Sync Dual 3.3V 9M-Bit 512K x 18 7.5ns 100Pin TQFP
* 100 percent bus utilization * No wait cycles between Read and Write * Internal self-timed write cycle * Individual Byte Write Control * Single Read/Write control pin * Clock controlled, registered address, data and control * Interleaved or linear burst sequence control using MODE input * Three chip enables for simple depth expansion and address pipelining * Power Down mode * Common data inputs and data outputs * CKE pin to enable clock and suspend operation * JEDEC 165-ball PBGA package * Power Supply: Vdd 2.5V ± 5%, Vddq 2.5V ± 5% * JTAG Boundary Scan for PBGA packages * Commercial and Industrial temperature available * Lead-free available.
电源电压DC 3.30 V, 2.63 V max
时钟频率 117MHz max
位数 18
存取时间 7.5 ns
内存容量 9000000 B
存取时间Max 7.5 ns
工作温度Max 85 ℃
工作温度Min 40 ℃
电源电压Max 3.465 V
电源电压Min 3.135 V
安装方式 Surface Mount
引脚数 100
封装 TQFP-100
封装 TQFP-100
工作温度 -40℃ ~ 85℃
产品生命周期 Not Recommended for New Designs
包装方式 Tube
RoHS标准 Non-Compliant