SRAM Chip Async Single 5V 1M-bit 128K x 8 15ns 32Pin TSOP-I
DESCRIPTION
The ISSI IS61C1024 and IS61C1024L are very high-speed, low power, 131,072-word by 8-bit CMOS static RAMs. They are fabricated using ISSI"s high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices.
When CE1is HIGH or CE2 is LOW deselected, the device assumes a standby mode at which the power dissipation can be reduced by using CMOS input levels.
Easy memory expansion is provided by using two Chip Enable inputs, CE1and CE2. The active LOW Write Enable WE controls both writing and reading of the memory.
The IS61C1024 and IS61C1024L are available in 32-pin 300-mil SOJ, and TSOP Type I, 8x20, and sTSOP Type I, 8 x 13.4 packages.
FEATURES
• High-speed access time: 12, 15, 20, 25 ns
• Low active power: 600 mW typical
• Low standby power: 500 µW typical CMOS standby
• Output Enable OE and two Chip Enable CE1and CE2 inputs for ease in applications
• Fully static operation: no clock or refresh required
• TTL compatible inputs and outputs
• Single 5V ±10% power supply
• Low power version available: IS61C1024L
• Commercial and industrial temperature ranges available