P5020NSN1QMB

MPU QorIQ P5020 RISC 64Bit 1.6GHz 1295Pin FCBGA Tray

Overview

The dual-core P5020 and single-core P5010 processors deliver 64-bit processing, based on the e5500 core built on Power Architecture® technology. With frequencies scalable to 2.0 GHz, large caches and high per-cycle efficiency, these products target control plane and compute applications that require high single-threaded performance.

The P5 platform leverages architectural features pioneered in the P4 platform, including the three-level cache hierarchy for low latencies, hardware hypervisor for robust virtualization support, data path acceleration architecture DPAA for offloading packet handling tasks from the core and the CoreNet® switch fabric that eliminates internal bottlenecks. This enables architectural compatibility from the P5 platform to the P4 platform as well as to the P3 platform.

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## Features

### Core Complex

* Single or dual 64-bit e5500 cores offered at 2.0 GHz

* Three level cache-hierarchy: 32 KB I/D L1; 512 KB private L2 per core; 2 MB shared L3

* Up to 2.0 GHz with 64-bit ISA support Power Architecture v2.06-compliant

* Three levels of instruction: user, supervisor, hypervisor

* Hybrid 32-bit mode to support legacy software and transition to 64-bit architecture

* 2.0 MB configures as dual 1 MB platform cache

### Networking Elements

* SerDes

* 18 lanes at up to 5 Gbps

* Supports SGMII, Serial RapidIO®, XAUI, PCI Express® PCIe rev1.1/2.0, SATA

* Ethernet interfaces

* 10 Gbps Ethernet MAC

* Five 1 Gbps Ethernet MACs

### Accelerators and memory control

* Two 64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving support

* Up to 1300MT/s

* Frame manager for packet handling

* Queue manager for policing, scheduling and workload distribution

* Security block for crypto algorithm acceleration

* RAID5/6 for parity calculations in storage applications

* RapidIO message manager for type 9 and 11 messaging

* Pattern matching engine for regular expression searches

### Basic Peripherals and Interconnect

* Up to four PCIe 2.0/3.0 controllers

* Two serial ATA SATA 2.0 controllers

* Two USB 2.0 controllers with integrated PHY

* Enhanced secure digital host controller SD/MMC/eMMC

* Two I²C controllers

* Two DUARTs

### Additional Features

* Hardware hypervisor for safe partitioning of operating systems between cores

* Trusted boot capability to ensure only the correct code is booted and that code is not reverse-engineered

* This product is included in ®.#8217;s product longevity program, with assured supply for a minimum of 10 years after launchComparison Table

### Comparison Table

| P5020 | P5010

\---|---|---

**Cores** | 2 | 1

**Core Frequency** | 1.6 to 2.0 GHz | 1.6 to 2.0 GHz

**L2 Cache** | 512 KB | 512 KB

**L3/Platform Cache** | 2 MB | 1 MB

**DDR3** | 2x 64-bit | 1x 64-bit

**GbE** | 5x 1 GbE 1x 10 GbE | 5x 1 GbE 1x 10 GbE

**SERDES** | 18 Lanes | 18 Lanes

**Security** | Trust | Trust