3.3V零延迟时钟缓冲器 3.3V ZERO DELAY CLOCK BUFFER
DESCRIPTION:
The IDT2305A is a high-speed phase-lock loop PLL clock buffer, designed to address high-speed clock distribution applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz.
FEATURES:
• Phase-Lock Loop Clock Distribution
• 10MHz to 133MHz operating frequency
• Distributes one clock input to one bank of five outputs
• Zero Input-Output Delay
• Output Skew < 250ps
• Low jitter <200 ps cycle-to-cycle
• IDT2305A-1 for Standard Drive
• IDT2305A-1H for High Drive
• No external RC network required
• Operates at 3.3V VDD
• Power down mode
• Available in SOIC package
| 型号 | 品牌 | 下载 |
|---|---|---|
| IDT2305A-1HDCGI | Integrated Device Technology 艾迪悌 | 下载 |
| IDT23S08E-1HPGG | Integrated Device Technology 艾迪悌 | 下载 |
| IDT2309NZ-1HDC | Integrated Device Technology 艾迪悌 | 下载 |
| IDT2309NZ-1HDC8 | Integrated Device Technology 艾迪悌 | 下载 |
| IDT2309NZ-1HDCI | Integrated Device Technology 艾迪悌 | 下载 |
| IDT2309NZ-1HDCI8 | Integrated Device Technology 艾迪悌 | 下载 |
| IDT2309NZ-1HPG | Integrated Device Technology 艾迪悌 | 下载 |
| IDT2309NZ-1HPG8 | Integrated Device Technology 艾迪悌 | 下载 |
| IDT2309NZ-1HPGI8 | Integrated Device Technology 艾迪悌 | 下载 |
| IDT2309NZ-1HPGI | Integrated Device Technology 艾迪悌 | 下载 |
| IDT2308B-3DCG | Integrated Device Technology 艾迪悌 | 下载 |