74HCT7046A - Phase-locked-loop with lock detector SOP 16Pin
The is a high-speed Si-gate CMOS Device specified in compliance with JEDEC standard no. 7. The 74HC/HCT7046 is phase-locked-loop circuit that comprises a linear voltage-controlled oscillator VCO and two different phase comparators PC1 and PC2 with a common signal input amplifier and a common comparator input. A lock detector is provided and this gives a HIGH level at pin 1 LD when the PLL is locked. The lock detector capacitor must be connected between pin 15 CLD and pin 8 GND. The input signal can be directly coupled to large voltage signals or indirectly coupled with a series capacitor to small voltage signals. A self-bias input/circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the "7046" forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques.