CMOS和盖茨 CMOS AND GATES
The is a CMOS quad 2-input AND Gate. The device provides the system designer with direct implementation of the AND function and supplement the existing family of CMOS gates. The device features standardized symmetrical output characteristics.
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Medium-speed operation 60ns at VDD = 10V
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100% Tested for quiescent current at 20V
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Maximum input current of 1µA at 18V
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2.5V at VDD = 15V Noise margin
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5V, 10V and 15V Parametric ratings
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Meets all requirements of JEDEC tentative standard No. 13B
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Green product and no Sb/Br