SN65LVDS86AQDGG

FLATLINK接收器 FLATLINK RECEIVER

description

The SN65LVDS86A/SN75LVDS86A FlatLink™ receiver contains three serial-in 7-bit parallel-out shift registers and four low-voltage differential signaling LVDS line receivers in a single integrated circuit. These functions allow receipt of synchronous data from a compatible transmitter, such as the SN75LVDS81, ’83, ’84, or ’85, over four balanced-pair conductors and expansion to 21 bits of single-ended low-voltage LVTTL synchronous data at a lower transfer rate.

• 3:21 Data Channel Expansion at up to 178.5 Mbytes/s Throughput

• Suited for SVGA, XGA, or SXGA Display

   Data Transmission From Controller to

   Display With Very Low EMI

• Three Data Channels and Clock

   Low-Voltage Differential Channels In and 21 Data and Clock Low-Voltage TTL Channels Out

• Operates From a Single 3.3-V Supply

• Tolerates 4-kV HBM ESD

• Packaged in Thin Shrink Small-Outline Package TSSOP With 20-Mil Terminal Pitch

• Consumes Less Than 1 mW When Disabled

• Wide Phase-Lock Input Frequency Range of 31 MHz to 68 MHz

• No External Components Required for PLL

• Inputs Meet or Exceed the Standard Requirements of ANSI EIA/A-644 Standard

• Improved Replacement for the DS90C364 and SN75LVDS86

• Improved Jitter Tolerance

• See SN65LVDS86A-Q1 Data Sheet for Information About the Automotive Qualified Version