Synchronizing cascaded dual positive edge-triggered D-type flip-flop
DESCRIPTION
The 74F50728 is a cascaded dual positive edge–triggered D–type featuring individual data, clock, set and reset inputs; also true and complementary outputs.
FEATURES
• Metastable immune characteristics
• Output skew less than 1.5ns
• See 74F5074 for synchronizing dual D-type flip-flop
• See 74F50109 for synchronizing dual J–K positive edge-triggered flip-flop
• See 74F50729 for synchronizing dual dual D-type flip-flop with edge-triggered set and reset
• Industrial temperature range available –40°C to +85°C
| 型号 | 品牌 | 下载 |
|---|---|---|
| I74F50728N | Philips 飞利浦 | 下载 |
| I74F3037D,518 | NXP 恩智浦 | 下载 |
| I74F3037D,512 | NXP 恩智浦 | 下载 |
| I74F133N,112 | NXP 恩智浦 | 下载 |
| I74F133D,118 | NXP 恩智浦 | 下载 |
| I74F133D,112 | NXP 恩智浦 | 下载 |
| I74F86D,602 | NXP 恩智浦 | 下载 |
| I74F00D,602 | NXP 恩智浦 | 下载 |
| I74F164D,118 | NXP 恩智浦 | 下载 |
| I74F164D,112 | NXP 恩智浦 | 下载 |
| I74F164N,112 | NXP 恩智浦 | 下载 |