74LVC07APW,118

74LVC07APW,118概述

带开漏输出的六频缓冲器

The is a hex non-inverting Buffer with open-drain outputs. The outputs can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. Inputs can be driven from either 3.3/5V devices. This feature allows the use of this device as translators in mixed 3.3 and 5V applications.

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CMOS low power consumption
.
Direct interface with TTL levels
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Inputs accept voltages up to 5V
.
Complies with JEDEC standard
74LVC07APW,118数据文档
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