74系列逻辑芯片/DM74LS74AMX
General Description
This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock. The data on the D input may be changed while the clock is LOW or HIGH without affecting the outputs as long as the data setup and hold times are not violated. A low logic level on the preset or clear inputs will set or reset the outputsregardless of the logic levels of the other inputs.
| 型号 | 品牌 | 下载 |
|---|---|---|
| DM74LS74AMX | Fairchild 飞兆/仙童 | 下载 |
| DM74LVX125MX | Fairchild 飞兆/仙童 | 下载 |
| DM74LS257BMX | National Semiconductor 美国国家半导体 | 下载 |
| DM74ALS244AWX | National Semiconductor 美国国家半导体 | 下载 |
| DM74ACT157SCX | Fairchild 飞兆/仙童 | 下载 |
| DM74VHC08MTCX | Fairchild 飞兆/仙童 | 下载 |
| DM74LS05M | Fairchild 飞兆/仙童 | 下载 |
| DM74ACT175MX | National Semiconductor 美国国家半导体 | 下载 |
| DM74ALS32MX | National Semiconductor 美国国家半导体 | 下载 |
| DM74ALS240ASJX | National Semiconductor 美国国家半导体 | 下载 |
| DM74LS123MX | Fairchild 飞兆/仙童 | 下载 |