AD9254BCPZRL7-150

ADC Single Pipelined 150MSPS 14Bit Parallel 48Pin LFCSP EP T/R

Product Details

The AD9254 is a monolithic, single 1.8 V supply, 14-bit, 150 MSPS analog-to-digital converter ADC, featuring a high performance sample-and-hold amplifier SHA and on-chip voltage reference. The product uses a multistage differential pipeline architecture with output error correction logic to provide 14-bit accuracy at 150 MSPS data rates and guarantees no missing codes over the full operating temperature range.

The wide bandwidth, truly differential SHA allows a variety of user-selectable input ranges and offsets, including single-ended applications. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available ADCs, the AD9254 is suitable for applications in communications, imaging, and medical ultrasound.

A differential clock input controls all internal conversion cycles. A duty cycle stabilizer DCS compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.

The digital output data is presented in offset binary, Gray code, or twos complement formats. A data output clock DCO is provided to ensure proper latch timing with receiving logic.

The AD9254 is available in a 48-lead LFCSP_VQ and is specified over the industrial temperature range −40°C to +85°C.

**Product Highlights**

1. The AD9254 operates from a single 1.8 V power supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families.

2. The patented SHA input maintains excellent performance for input frequencies up to 225 MHz.

3. The clock DCS maintains overall ADC performance over a wide range of clock pulse widths.

4. A standard serial port interface supports various product features and functions, such as data formatting offset binary, twos complement, or Gray coding, enabling the clock DCS, power-down, and voltage reference mode.

5. The AD9254 is pin-compatible with the AD9233, allowing a simple migration from 12 bits to 14 bits.

**Applications**

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Ultrasound equipment

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IF sampling in communications receivers

CDMA2000, WCDMA, TD-SCDMA, and WiMax

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Battery-powered instruments

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Hand-held scopemeters

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Low cost digital oscilloscopes

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Macro, micro, and pico cell infrastructure

### Features and Benefits

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1.8 V analog supply operation

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1.8 V to 3.3 V output supply

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SNR = 71.8 dBc 72.8 dBFS to 70 MHz input

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SFDR = 84 dBc to 70 MHz input

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Low power: 430 mW @ 150 MSPS

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Differential input with 650 MHz bandwidth

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On-chip voltage reference and sample-and-hold amplifier

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DNL = ±0.4 LSB

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Flexible analog input: 1 V p-p to 2 V p-p range

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Offset binary, Gray code, or twos complement data format

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Clock duty cycle stabilizer

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Data output clock