MC14049UB

六角缓冲器 Hex Buffers

The hex inverter buffer is constructed with MOS P channel and N channel enhancement mode devices in a single monolithic structure.This complementary MOS device finds primaryuse where low power dissipation and or high noise immunity is desired. This device provides logic level conversion using only one supply voltage V. The input signal high level V supply voltage for logic level conversions.Two TTL DTL Loads can be driven when the device is used as CMOS to TTL DTL converters V 3.2 mA. Note that pins 13 and 16 are not connected internally on this device consequently connections to these terminals will not affect circuit operation.

Features

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High Source and Sink Currents

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High-to-Low Level Converter

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Supply Voltage Range = 3.0 V to 18 V

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Meets JEDEC UB Specifications

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VIN can exceed VDD

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Improved ESD Protection on All Inputs

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Pb-Free Packages are Available*